*Read attachment for more clear detail* CS271 ARM Assembly Lab 3ARM Branching, C

*Read attachment for more clear detail*
CS271 ARM Assembly Lab 3ARM Branching, Conditional Execution, and Control StructuresInstructions:Read through this document carefully and enter the code and step through it.  Make sure that you understand each line of code and what it is doing.  Focus your attention on how loops and branch structures are set up in assembly by using absolute (a goto) and conditional (goto if a condition is meet) branch statements. In this lab you will write your own looping and conditional control structures. Part 1 (adding numbers):Let’s start our introduction using a simple example. Imagine that we want to add the numbers from 1 to 10. We might do this in C as follows.  int total;int i;    total = 0;for (i = 10; i > 0; i–) {        total += i;}###### Python code ######total = 0i = 10for a in list(reversed(range(11))):  total = total + aprint(total)  The following is one “Smart” way to implement this into ARM assembler, the problem is the loop structure is really a repeat loop, not a for loop./* — sum-to-ten.s */.text.global _start_start:mov r0, #0      @ r0 stores the totalmov r1, #10    @ r1 plays the role of loop control variable iagain:add r0, r0, r1  @ it really is total += isubs r1, r1, #1 @ i–bne again      @ goto again if the above statement isn’t zero end:mov r7, #1      @ setup exit    swi 0          @ exitThe following is one direct “direct” to implement this into ARM assembler– a for loop./* — sum-to-ten.s result is 55*/.text.global _start_start:        mov r0, #0      @ r0 := 0        mov r1, #10    @ r1 := 16
again:        CMP r1, #0 @ check if R1 is zero        beq end        @ checking we have hit zero, done with loop if yes        add r0, r0, r1  @ r0 := r0 + r1        sub r1, r1, #1  @ r1 := r1 – 1        b againend:        mov r7, #1      @ setup exit        swi 0          @ exitIn the above assembly language programs, we first use the MOV instruction to initialize R0 with 0 and R1 with 10. The ADD instruction computes the sum of R0 and R1 (the second and third arguments) and places the result into R0 (the first argument); this corresponds to the total += i; line of the equivalent C program or total = total + a for Python. Note the use of the labelagain:.  A label is simply a relative memory address of where an instruction is when the assembler loads it into memory.  The SUBS instruction decreases R1 by 1. Also note that in the above code .text and end: labels do not affect the correctness of the code. To understand the next instruction, we need to understand that in addition to the registers R0 through R15, the ARM processor also incorporates a set of four “flags,” labeled the zero flag (Z), the negative flag (N), the carry flag (C), and the overflow flag (V). Whenever an arithmetic instruction has an S at its end, as SUBS does, these flags will be updated based on the result of the instruction execution. In this case, if the result of decreasing R1 by 1 is 0, the Z flag will become 1; the N, C, and V flags are also updated, but they’re not pertinent to our discussion of this code. Note that we can replace Subs with a CMP r1, #0 as we did with the second example.For the first example, the instruction, BNE, will check the Z flag. If the Z flag is not set (i.e., the previous subtraction gives a nonzero result), then BNE writes the address of the label “again” into the PC (program counter) so that the next instruction executed is the ADD instruction on the line indicted by the label “again:”; this essential is a goto statement and leads to repeating the loop with a smaller value of R1. If the Z flag is set the BNE is not executed (this is the conditional execution), so the processor will simply continue on to the next instruction. Assemble and link one of the sample code and verify it produces the correct sum, which should be 55. Once you have this sample program functioning, modify it so it sums the even numbers from 0 to 16, name it aal3_1.s and  submit the modified .s file for this part. [Hint: if you start r1 with 16 and subtract 2 from it, the value in r1 is always even. You can also read on to Part 2 on discussions on checking if an integer is odd or even.Part 2 (Collatz sequence or hailstone sequence):Now, let’s consider the collatz sequence. Given an integer n, we repeatedly want to apply the following procedure.n ← 3  /* or what ever number you want to start with */iters ← 0while n ≠ 1:    iters ← iters + 1if n is odd:        n ← 3 ⋅ n + 1else:        n ← n / 2###### Python code ######n = 3iters = 0while n != 1:  iters = iters + 1  #print(iters, n)  if (n % 2) == 1 :
n = 3 * n + 1  else:    n = n /2print(n, iters)For example, if we start with 3, then since this is odd our next number is 3 ⋅ 3 + 1 = 10. This is even, so our next number is 10 / 2 = 5. This is odd, so our next number is 3 ⋅ 5 + 1 = 16. This is even, so we then go to 8, which is still even, so we go to 4, then 2, and 1. The program terminates then.In translating this to ARM’s assembly language, we must know that ARM does not have any instructions related to division. (Designers felt division is too rarely necessary to merit wasting transistors on the complex circuit that it requires.) Fortunately, the division in this algorithm is relatively simple: We merely divide n by 2, which can be done with a right shift.ARM has an unusual approach to shifting: We have already seen that every basic arithmetic instruction, the final argument can be a constant (as in SUBS R1, R1, #1) or a register (as in ADD R0, R0, R1). But when the final argument is a register, we can optionally add a shift distance: For instance, the instruction “ADD R0, R0, R1, LSL #1”. says to add a left-shifted version of R1 before adding it to R0 (while R1 itself remains unchanged). The ARM instruction set supports five types of shifting (readhttp://www.davespace.co.uk/arm/introduction-to-arm/barrel-shifter.html if necessary) :LSL    logical shift leftLSR    logical shift rightASR    arithmetic shift rightROR    rotate rightRRX    rotate right extended (include carry when shift)The shift distance can be an immediate between 1 and 32, or it can be based on a register value: “MOV R0, R1, ASR R2” is equivalent to “R0 = R1 >> R2”. The best way to understand these is by using the VisUAL.In translating our pseudo-code to assembly language, we’ll find the shift operations are useful both for multiplying n by 3 (computed as n + (n « 1)) and for dividing n by 2 (computed as n » 1). We’ll also need to deal with testing whether n is odd. We can do this by testing whether n’s 1’s bit is set, which we can accomplish using the ANDS instruction to perform a bitwise AND with 1. The ANDS instruction sets the Z flag based on whether the result is 0.  If the result is 0, then this means that the 1’s bit of n is 0, and so n is even, as shown in the code..text.global _start_start:mov r0, #3              @ r0 is current numbermov r1, #0              @ r1 is number of iterationsagain:add r1, r1, #1          @ increment number of iterationsands r7, r0, #1        @ test if r0 is oddbeq even                @ branch if not odd (even)odd:add r0, r0, r0, lsl #1  @ if odd, r0 := 3 * r0  (r0 + 2 * r0)add r0, r0, #1          @ r0 := r0 + 1b again                @ loop because we know r0 > 1even:mov r0, r0, asr #1      @ if even, r0 := r0 >> 1subs r7, r0, #1        @ see if r0 != 1bne again              @ if not 1, loop again
end:mov r0, r1              @ store number of iterations in r0  mov r7, #1              @ setup exit  swi 0                  @ exitAssemble and link the sample code and verify it produces the correct number of iterations. Submit the .s file.More on LabelsA further explanation of labels in ARM:Labels are symbols representing the memory addresses of instructions or data. The address can be PC-relative, register-relative, or absolute. Labels are local to the source file unless you make them global using the EXPORT directive. The default is PC-relative; that is what is used above.The address given by a label is calculated during assembly. The assembler calculates the address of a label relative to the origin of the section where the label is defined. A reference to a label within the same section can use the PC plus or minus an offset. This is called PC-relative addressing.Addresses of labels in other sections are calculated at link time, when the linker has allocated specific locations in memory for each section.Part 3 (conditional execution; if-then-else): Write a program that starts with three integer values (stored in three registers using MOV) and then determines the largest value of the three and stores that value into a fourth answer register. Do not change any of the values in the first three registers during your program’s execution. So start your program with something like:    MOV R1, #34      MOV R2, #54      MOV R3, #21      MOV R0, #0    /* register to hold answer */Be sure that your program will work with any set of positive integers, so run your program with several different values in r1, r2, & r3.  Make sure that you test a largest value in each register as I may check for that. To make it easier to inspect this result, save the result in R0, the return register from your main function.Part 4 (iterative control structures): Now, on your own, write a program that computes terms of the Fibonacci series, starting with 0, is defined as:1, 1, 2, 3, 5, 8, 13, 21, 34, 55, …###### Python code ######n = 25f_first = 1f_second = 1i = 2while i <= n:  f_new = f_first + f_second  f_first = f_second  f_second = f_new  i = i + 1print("fib %s is %s", n, f_new) Each term in the series is the sum of the preceding two terms. So, for example, the 7th term (13) is the sum of the 5th and 6th terms (5+ 8). Write the program as a counting loop for terms 3 and on. You should test your output for the 11thterms of the series. You are not saving all of the terms, only the last TWO which are then used to compute the next term. Use a register for the current term and a register for the previous term. Each execution of the loop computes a new current term (in a third register) and then copies the old current term to the previous term register and the new term to the current term register. You will also need a fourth register for your loop counter.Also test your program for the 25th fib in this sequence, which should be 75025.Inspecting the ResultUnfortunately, the 25th fib is too large to be a valid return value so if you inspect the result from executing the program, it will be a truncated value, which is the reminder of 256. When and what to turn in:For this, and remaining assembler labs, beside a PDF file to show me that your code worked (show the running of as, ld, ./program_name, and echo),  turn in each ARM assembly program that you write in separately so that I can load and execute them. Label them as AAL3_1.s, AAL3_2.s, etc. Please write your name in each file.